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Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
FEATURES
* 'Trench' technology * Low on-state resistance * Fast switching
SYMBOL
d
QUICK REFERENCE DATA VDSS = 200 V ID = 7.6 A
g
RDS(ON) 230 m
s
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic full pack envelope using 'trench' technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. The PHX14NQ20T is supplied in the SOT186A (FPAK) conventional leaded package.
PINNING
PIN 1 2 3 case gate drain source isolated DESCRIPTION
SOT186A (FPAK)
case
SOT186 (FPAK)
case
123
123
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 C to 150C Tj = 25 C to 150C; RGS = 20 k Ths = 25 C; VGS = 10 V Ths = 100 C; VGS = 10 V Ths = 25 C Ths = 25 C MIN. - 55 MAX. 200 200 20 7.6 4.8 30 30 150 UNIT V V V A A A W C
November 2000
1
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy Peak non-repetitive avalanche current CONDITIONS Unclamped inductive load, IAS = 14 A; tp = 38 s; Tj prior to avalanche = 25C; VDD 25 V; RGS = 50 ; VGS = 10 V; refer to fig 15 MIN. MAX. 70 UNIT mJ
IAS
-
14
A
THERMAL RESISTANCES
SYMBOL PARAMETER Rth j-hs Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT186A package, in free air TYP. MAX. UNIT 55 4.17 K/W K/W
ELECTRICAL CHARACTERISTICS
Tj= 25C unless otherwise specified SYMBOL PARAMETER V(BR)DSS VGS(TO) RDS(ON) gfs IGSS IDSS Qg(tot) Qgs Qgd td on tr td off tf Ld Ls Ciss Coss Crss Drain-source breakdown voltage Gate threshold voltage Drain-source on-state resistance Forward transconductance Gate source leakage current Zero gate voltage drain current Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55C VDS = VGS; ID = 1 mA Tj = 150C Tj = -55C VGS = 10 V; ID = 7 A VGS = 10 V; ID = 7 A; Tj = 150C VDS = 25 V; ID = 7 A VGS = 10 V; VDS = 0 V VDS = 200 V; VGS = 0 V Tj = 150C ID = 14 A; VDD = 160 V; VGS = 10 V MIN. 200 178 2 1 6 TYP. MAX. UNIT 3 150 12.1 10 0.05 38 4 13.3 25 40 83 31 4.5 7.5 1500 128 60 4 6 230 540 100 10 500 V V V V V m m S nA A A nC nC nC ns ns ns ns nH nH pF pF pF
VDD = 100 V; RD = 10 ; VGS = 10 V; RG = 5.6 Resistive load Measured from drain lead to centre of die Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz
November 2000
2
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 14 A; VGS = 0 V IF = 14 A; -dIF/dt = 100 A/s; VGS = 0 V; VR = 30 V TYP. MAX. UNIT 1.0 135 690 14 56 1.5 A A V ns nC
ISOLATION LIMITING VALUE & CHARACTERISTIC
Ths = 25 C unless otherwise specified SYMBOL Visol PARAMETER R.M.S. isolation voltage from all three terminals to external heatsink Repetitive peak voltage from all three terminals to external heatsink Capacitance from pin 2 to external heatsink CONDITIONS SOT186A package; f = 50-60 Hz; sinusoidal waveform; R.H. 65%; clean and dustfree SOT186 package; R.H. 65%; clean and dustfree f = 1 MHz MIN. TYP. MAX. 2500 UNIT V
Visol
-
1500
V
Cisol
-
10
-
pF
November 2000
3
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
with heatsink compound
10
Transient thermal impedance, Zth j-a (K/W)
D = 0.5 1 0.2 0.1 0.05 0.1 0.02 single pulse
0
20
40
60
80 Ths / C
100
120
140
0.01 1E-06
1E-05
1E-04
1E-03 1E-02 1E-01 Pulse width, tp (s)
1E+00
1E+01
Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tmb)
Normalised Current Derating
with heatsink compound
Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T
Drain Current, ID (A) 10V 25 20 15 10 5V 5 VGS=4.5 0 0 1 2 3 4 5 6 7 8 9 10 5.5 15V 6.5V 6V
120 110 100 90 80 70 60 50 40 30 20 10 0
ID%
30
0
20
40
60
80 Ths / C
100
120
140
Drain-Source Voltage, VDS (V)
Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 10 V
Peak Pulsed Drain Current, IDM (A)
Fig.5. Typical output characteristics, Tj = 25 C. ID = f(VDS); parameter VGS
Drain-Source On Resistance, RDS(on) (Ohms) 0.8 0.7 4.5V 5V 5.5V 0.5
1000
100
RDS(on) = VDS/ ID tp = 10 us
0.6
10 100us 1 ms 1 D.C. 10 ms 100 ms 0.1 1 10 100 Drain-Source Voltage, VDS (V) 1000
0.4 0.3 0.2 0.1 0 0 10 Drain Current, ID (A)
6V
6.5V
10V
VGS =20 V
20
Fig.3. Safe operating area. Tmb = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp
Fig.6. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(ID); parameter VGS
November 2000
4
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
Drain current, ID (A) 28 24 20 16 12 8 4 0 0 2 4 6 Gate-source voltage, VGS (V) 8 10 150 C Tj = 25 C
5 4.5 4 3.5 3 2.5 2 1.5 1 0.5
VGS(TO) / V max typ
min
0 -100
-50
0
Tj / C
50
100
150
Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
Transconductance, gfs (S)
Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
Sub-Threshold Conduction
20
1E-01
15
1E-02 2% typ 98%
10
1E-03
1E-04
5
1E-05
0 0 4 8 12 16 ID / (A) 20 24 28
1E-06
0
1
2
3
4
5
Fig.8. Typical transconductance, Tj = 25 C. gfs = f(ID); conditions: VDS = 25 V
Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS
Capacitances, Ciss, Coss, Crss (pF)
2.5
a
Rds(on) normalised to 25 deg C
10000
Ciss
2
1000 Coss 100
1.5
1
Crss
0.5 -70 -20 30 80 Ths / deg C 130
10 0 10 20 30 40 Drain-Source Voltage, VDS (V)
Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 7 A; VGS = 10 V
Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
November 2000
5
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
Gate-source voltage, VGS (V) 14 12 10 8 6 4 2 0 0 10 20 Gate charge, QG (nC) 30 40
Maximum Avalanche Current, IAS (A) 100
VDD = 40 V
10
25 C
VDD = 160 V 1 Tj prior to avalanche = 150 C
0.1 0.001
0.01
0.1 Avalanche time, tAV (ms)
1
10
Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 14 A; parameter VDS
Source-Drain Diode Current, IF (A) VGS = 0 V
Fig.15. Maximum permissible non-repetitive avalanche current (IAS) versus avalanche time (tAV); unclamped inductive load
30
20
150 C
Tj = 25 C
10
0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
Source-Drain Voltage, VSDS (V)
Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
November 2000
6
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3 lead TO-220 SOT186A
E P q D1 T
A A1
D
j L2 b1 L b2 L1 K Q
1
2
b e e1
3
wM c
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.6 4.0 A1 2.9 2.5 b 0.9 0.7 b1 1.1 0.9 b2 1.4 1.2 c 0.7 0.4 D 15.8 15.2 D1 6.5 6.3 E 10.3 9.7 e 2.54 e1 5.08 j 2.7 2.3 K 0.6 0.4 L L1 L2 max. 3
(1)
P 3.2 3.0
Q 2.6 2.3
q 3.0 2.6
T
(2)
w 0.4
14.4 3.30 13.5 2.79
2.5
Notes 1. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned. 2. Both recesses are 2.5 x 0.8 max. depth OUTLINE VERSION SOT186A REFERENCES IEC JEDEC TO-220 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-06-11
Fig.16. SOT186A; The seating plane is electrically isolated from all terminals. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8".
November 2000
7
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3 lead TO-220 exposed tabs SOT186
E E1 P m A A1
q D1
D
L1 Q
L L2
b1
1
2
b e e1
3
wM c
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 4.4 4.0 A1 2.9 2.5 b 0.9 0.7 b1 1.5 1.3 c 0.55 0.38 D 17.0 16.4 D1 7.9 7.5 E 10.2 9.6 E1 5.7 5.3 e 2.54 e1 5.08 L 14.3 13.5 L1(1) 4.8 4.0 L2 10 m 0.9 0.5 P 3.2 3.0 Q 1.4 1.2 q 4.4 4.0 w 0.4
Note 1. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned. OUTLINE VERSION SOT186 REFERENCES IEC JEDEC TO-220 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-06-11
Fig.17. SOT186; The seating plane is electrically isolated from all terminals. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8".
November 2000
8
Rev 1.100
Philips Semiconductors
Product specification
N-channel TrenchMOS transistor
PHX14NQ20T , PHF14NQ20T
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 2000 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
November 2000
9
Rev 1.100

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